Neo 1973 GTA01 Power Management
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+ | == System Level == | ||
+ | |||
+ | FIXME | ||
+ | |||
+ | == S3C2410 == | ||
+ | |||
+ | The S3C2410 has the following modes: | ||
+ | |||
+ | === Normal Mode === | ||
+ | |||
+ | This is the most power-consuming mode. Regular operation at full clock speed (266MHz). | ||
+ | The typical power consumption is 335mW in this mode. | ||
+ | |||
+ | We can dynamically reduce the CPU core clock speed to lower frequencies, if required. | ||
+ | |||
+ | === Idle Mode === | ||
+ | |||
+ | In this mode, FCLK to the CPU core is switched off. This reduces the power consumption to about half the typical 'Normal mode' consumption: 177mW | ||
+ | |||
+ | ==== Wake-up sources ==== | ||
+ | |||
+ | any interrupt. | ||
+ | |||
+ | === Slow Mode === | ||
+ | |||
+ | In slow mode, FCLK is tied to the external crystal, i.e. 12MHz in our case. The CPU core, SDRAM and bus clocks are also running at 12MHz. | ||
+ | |||
+ | This reduces the power consumption to typically 33mW. | ||
+ | |||
+ | ==== Wake-up sources ==== | ||
+ | |||
+ | none, we can just use our slowly running code to switch back to Normal mode, if it's required. | ||
+ | |||
+ | === Power_off Mode === | ||
+ | |||
+ | In Power_off mode, only the SDRAM is held in refresh, and the SoC-internal wake-up logic and RTC is powered. This means that the overall power consumption of the CPU goes down to max. 100uA, which translates to 200uW at 2.0V core voltage. | ||
+ | |||
+ | ==== Wake-up sources ==== | ||
+ | |||
+ | The number of wake-up sources is more restricted in this mode: | ||
+ | |||
+ | * EINT[0...15] | ||
+ | * RTC Alarm Interrupt | ||
+ | * nBATT_FAULT pin | ||
+ | |||
+ | ==== System design considerations ==== | ||
+ | |||
+ | In order to fully support Power_off mode, we need to | ||
+ | * Be able to switch off VDDi/VDDiarm/VDDi_MPLL/VDDi_UPLL separately from VDDalive, using a switch based on the PWREN signal | ||
+ | |||
== Voltages == | == Voltages == | ||
+ | |||
=== VB === | === VB === |
Revision as of 18:45, 20 February 2007
Contents |
System Level
FIXME
S3C2410
The S3C2410 has the following modes:
Normal Mode
This is the most power-consuming mode. Regular operation at full clock speed (266MHz). The typical power consumption is 335mW in this mode.
We can dynamically reduce the CPU core clock speed to lower frequencies, if required.
Idle Mode
In this mode, FCLK to the CPU core is switched off. This reduces the power consumption to about half the typical 'Normal mode' consumption: 177mW
Wake-up sources
any interrupt.
Slow Mode
In slow mode, FCLK is tied to the external crystal, i.e. 12MHz in our case. The CPU core, SDRAM and bus clocks are also running at 12MHz.
This reduces the power consumption to typically 33mW.
Wake-up sources
none, we can just use our slowly running code to switch back to Normal mode, if it's required.
Power_off Mode
In Power_off mode, only the SDRAM is held in refresh, and the SoC-internal wake-up logic and RTC is powered. This means that the overall power consumption of the CPU goes down to max. 100uA, which translates to 200uW at 2.0V core voltage.
Wake-up sources
The number of wake-up sources is more restricted in this mode:
- EINT[0...15]
- RTC Alarm Interrupt
- nBATT_FAULT pin
System design considerations
In order to fully support Power_off mode, we need to
- Be able to switch off VDDi/VDDiarm/VDDi_MPLL/VDDi_UPLL separately from VDDalive, using a switch based on the PWREN signal
Voltages
VB
- Battery terminal voltage
- Used by
CORE_1V8
This is the S3C2410 Core Voltage
- Generated by PMU DCUD
IO_3V3
- Generated by PMU DCDE
- Used by
- Vibrator
- FLASH_3V3 (see below)
- Touch panel transistors
- S3C2410 VDDA_ADC
- S3C2410 VDDOP
- S3C2410 VDDMOP
- S3C2410 nBATT_FLT
- U1502 (latch for GSM UART)
- S3C2410 EXTCLK ???
- SDRAM
GL_3V3
- Generated by PMU DCDF
- Used by
- AGPS
- Controlled by
- PMU
PM Driver
- Switch on/off if GPS is used or not
Initial state
- disabled by u-boot PMU initialization
CODEC_3V3
- Generated by PMU IOVDD
- Used for
- Audio Codec (digital and analog)
- Controlled by
- PMU Driver
PM Driver
- mostly included in ASoC, right?
- switch on, only if Audio path is required.
Initial state
- disabled by PMU initialization in u-boot
LCM_3V3
- Generated by PMU LPVDDD
- Used by
- Headset/GSM Uart Latch
- LCM
PM Driver
- check whether we really need to switch this off, since LCM has sophisticated PM features
Initial state
- enabled by u-boot PMU initialization
BT_3V15
- Generated by PMU D1REG
PM Driver
- has to be powered up before Bluetooth can be used
- Bluetooth device automatically enumerates at bus
Initial state
- disabled by u-boot PMU initialization
GL_2V5
- Generated by PMU D2REG
- Used by
- AGPS
- Controlled by
- PMU Driver
PM Driver
- switch on only in case GPS is enabled
Initial state
- disable by u-boot GPIO initialization
USER1
FIXME: no idea what this is for
- Generated by PMU D3REG
PMU Driver
- permanently disabled
Initial state
- disabled by PMU initialization in u-boot
FLASH_3V3
- Derived from IO_3V3
- Used by
- NAND Flash
- Controlled by
- SD_EN GPIO
PM Driver
- do we really want to switch it on/off before every flash access?
- if we go to standby, IO_3V3 will be switched off, thus FLASH_3V3 is off, too
Initial state
- on, enabled by u-boot GPIO initialization
AVDD
- Generated by U6707
- Used by
- AGPS
- Controlled by
- EN_AGPS3V GPIO
PM Driver
- Switch on only if GPS enabled
VTCXO_2V8
- Generated by U7608
- Used by
- AGPS
- Controlled by
- EN_GPS2V8 GPIO
PM Driver
- enable only if GPS is used.
Initial State
- disabled by u-boot GPIO initialization
SD_3V3
- Derived from IO_3V3
- Used by
- microSD slot
- Controlled by
- SD_ON GPIO
PM Driver
- we don't want to switch this off while mounted, do we?
Initial state
- probably disabled, unless somebody uses 'mmcinit' from u-boot
- but we can't disable it without disabling NAND.
- result: enabled by u-boot GPIO initialization
Kernel API
Userspace API
Approximate power draw of various subsystems. Estimated from datasheets.
The battery has a total of 1200mAh, at 3.6V. This is approximately 3500mWh, once power supply losses are taken into account.
- LCD
- 200mW with backlight at full brightness
- 40mW with backlight at 10%
- Based on similar 2.8" LCDs.
- CPU
- 320mW @ 200MHz
- 450mW @ 266MHz
- 140mW @ 200MHz idle.
- 50mW @ 12MHz (slow mode)
- These include fudge factors for RAM and other systems, from the CPU datasheet.
- Bluetooth ?
- GSM ?
- GPS
- 45mW
- Based on comparison with a broadly similar (though not as fully featured chip from Maxim
- 45mW
USB seems unlikely to work in slow mode. The LCD controller is unknown - the product notes say that it has RAM, which may imply it can self-refresh.
This would imply that with the CPU constantly on in low power mode, GPS and GSM blipping on and off, and display off, the worst case power consumption is probably around 70mW, leading to a battery life of 2 days. If the CPU is turned off, battery life rises significantly.
With everything on, playing video with sound, for example should get well over 4 hours.