Gpsd

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(PMB 2520)
(PMB 2520 Hammerhead)
Line 16: Line 16:
 
*Post processor including peak detection logic
 
*Post processor including peak detection logic
 
*SRAM for storing correlation results
 
*SRAM for storing correlation results
 +
 +
=== Host Interface ===
 +
 +
The Hammerhead integrates 3 serial interfaces:
 +
*UART
 +
*I2C
 +
*SPI
 +
 +
The UART in the Hammerhead is a full-duplex UART interface. It is fixed in 8N1(8 data bits, no parity, 1 stop bit) mode. On the GTA01, the host processor connect with the Hammerhead through the UART.
  
 
== GPS on GTA01 ==
 
== GPS on GTA01 ==

Revision as of 02:55, 8 February 2007

Contents

GPS

GPS(Global Positioning System)

AGPS

PMB 2520 Hammerhead

The PMB 2520 Hammerhead is a IC sulution for GPS that producted by the Infineon Technologies. It allows the usage of assistance data by surpporting A-GPS standards.

Modules of the Hammerhead

The Hammerhead consists of the following modules:

  • RF front-end with on-chip, high gain and low noise, LNA, I/Q mixers, on-chip polyphase complex IF filter, digitally controlled AGC, and 3-bits ADC for the I and Q paths.
  • Sigma-Delta RF PLL with on-chip PCO and on-chip loop filter.
  • Embedded PLL and NCO for baseband clock generation.
  • Multiple channels digital mixers and parallel correlator engines to enable real time correlation of the PRN code for up to 14 satellites.
  • Post processor including peak detection logic
  • SRAM for storing correlation results

Host Interface

The Hammerhead integrates 3 serial interfaces:

  • UART
  • I2C
  • SPI

The UART in the Hammerhead is a full-duplex UART interface. It is fixed in 8N1(8 data bits, no parity, 1 stop bit) mode. On the GTA01, the host processor connect with the Hammerhead through the UART.

GPS on GTA01

Personal tools

GPS

GPS(Global Positioning System)

AGPS

PMB 2520 Hammerhead

The PMB 2520 Hammerhead is a IC sulution for GPS that producted by the Infineon Technologies. It allows the usage of assistance data by surpporting A-GPS standards.

Modules of the Hammerhead

The Hammerhead consists of the following modules:

  • RF front-end with on-chip, high gain and low noise, LNA, I/Q mixers, on-chip polyphase complex IF filter, digitally controlled AGC, and 3-bits ADC for the I and Q paths.
  • Sigma-Delta RF PLL with on-chip PCO and on-chip loop filter.
  • Embedded PLL and NCO for baseband clock generation.
  • Multiple channels digital mixers and parallel correlator engines to enable real time correlation of the PRN code for up to 14 satellites.
  • Post processor including peak detection logic
  • SRAM for storing correlation results

Host Interface

The Hammerhead integrates 3 serial interfaces:

  • UART
  • I2C
  • SPI

The UART in the Hammerhead is a full-duplex UART interface. It is fixed in 8N1(8 data bits, no parity, 1 stop bit) mode. On the GTA01, the host processor connect with the Hammerhead through the UART.

GPS on GTA01